Maxime_Kanawasaki
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PCIe Example Design for Arrow EAGLE Board
Hello !! I'm using Arrow Agilex-5 EAGLE Board with Device A5ED065BB32AE4SR0 with Q25.1 I've generated IP Core Example Design for Development Kit selected NONE. GTS AXI Streaming Intel FPGA IP for PCI Express Then, I've compiled the Example Design and then modified the pins to match the Agilex-5 EAGLE Board schematics. There are several problems: - input p0_pin_perst_n_i_reset_n assigned to PIN_CF132 which is PCIE_RTSb - input p0_pin_perst_n_1_i_reset_n I've tried to assign to many different pins which were reasonable to connect, but was getting error during the Fitting stage. The only pin assignment which passing compilation is suggested by tool: PIN_BU109 which is according to schematics CX_SMB_SDA - input refclk_clk I had to connect to PIN_A23 which is FPGA_25M_CLK and thus I had to change IO PLL Reference Clock to 25MHz instead of default 100MHz After design was successfully compiled, it was programmed to Agilex-5 FPGA and connected to PC running Ubuntu 24.04.2 LTS. Then, I've tried to list PCIe devices with command lspci and I never got Altera Agilex-5 device recognized between PCIe devices. So, now, I'm not sure, if the problem with pin assignment or something else. Does anyone tried PCIe IP for EAGLE Board or probably someone can assist??? Thanks in advice!!!1.4KViews0likes5Comments