ContributionsMost RecentMost LikesSolutionsRe: Changing Quartus Prime Pro License name and host id Hi, I need your help on how to post private message. Thank you. Re: Changing Quartus Prime Pro License name and host id Hi, Thank you for replying. I added my colleague's details using add new admin option. But I cannot find the details of the license when I login using colleague's account. The admin email address and the login email address are the same. Thank you. Software License type clarification Hi, I see there are two types of licenses. 1)Fixed license (one of the license types for Intel Quartus Prime Pro) 2)Named academic user (one of the license types for Intel oneAPI Base toolkit) I seek your clarification on the following What is the difference between the two license types? I understand that fixed license can be used only in one workstation. Am I correct to say that I can have several copies of the software in different workstations but have only one copy in use at any given time? My workstation allows to dual boot both windows and Linux OS. If I have a fixed license, does the license allow me to have both Linux and windows versions of the software installed in the workstation. Thank you Exception unhandled when using -fintelfpga Hi, I am using Microsoft Visual Studio 2019 as the development environment for my DPC++ application. My target platform is FPGA emulation. When I did the following: project properties->configuration properties->DPC++->General->Enable FPGA workflows->Yes, The program throws an exception. The program file is attached with this query. I am not sure how to eliminate the exception. I need your help. Thank you. unable to find the option: Perform offline (ahead of time) compilation for FPGA target Hi, I am developing a DPC++ project using Microsoft Visual Studio 2019. I am unable to find the option: Perform offline (ahead of time) compilation for FPGA target in DPC++-> general Tab. I appreciate your assistance on how to set AOT compilation in MS Visual Studio Thank you. Re: DPC++ project built for FPGA emulation takes very long time to implement on CPU Hi BB, Thank you for your reply. I am using Microsoft Visual Studio 2019 to run the emulation. I am not able to attach the file. Please refer to the test project implementation below #include <iostream> #include <numeric> #include <chrono> #include <iomanip> #include <complex> #include <array> #include <vector> #include<fstream> //#define standard_cpp #define oneApi_FPGA #ifdef standard_cpp #include "../Standard_CPP/standardCPPFile.h" #endif #ifdef oneApi_FPGA #include "../Oneapi_FPGA/DPCPPFile.h" #endif using namespace std; void Test() { #ifdef standard_cpp DPCPPFile obj; #endif #ifdef oneApi_FPGA standardCPPFile obj; #endif for (int i = 0; i < 999000; i++) { obj.func(); } } int main() { Test(); cout << "success" << endl; return 0; } The test project calls both standard C++ and DPC++ versions of the function->func This is a sample implementation of func in DPC++. void DPCPPFile::func(int v) { std::vector<std::complex<float>>Atemp(7); std::vector<std::complex<float>>Btemp(7); std::vector<std::vector<std::complex<float>>>Ztemp(7); // std::cout << "find best symbol index is" << v << std::endl; cl::sycl::ext::intel::fpga_emulator_selector d_selector; // queue declaration cl::sycl::queue Q(d_selector); sycl::buffer AtempBuff(Atemp); sycl::buffer BtempBuff(Btemp); sycl::buffer ZtempBuff(Ztemp); Q.submit([&](sycl::handler& h) { sycl::accessor AtempAccess(AtempBuff, h, sycl::write_only); sycl::accessor BtempAccess(BtempBuff, h, sycl::read_only); sycl::accessor ZtempAccess(ZtempBuff, h, sycl::read_only); h.parallel_for(sycl::range<1>(Nr), [=](auto idx) { AtempAccess[idx] = std::conj(BtempAccess[v - 1]) * ZtempAccess[v][idx]; }); }); sycl::host_accessor AtempHost(AtempBuff); Below is the same implementation in standard CPP void standardCPPFile::func(int v,int Nr) { std::vector<std::complex<float>>Atemp(7); std::vector<std::complex<float>>Btemp(7); std::vector<std::complex<float>>Ztemp(7); // std::cout << "find best symbol index is" << v << std::endl;. for (int i = 0; i < Nr; i++) { Atemp[Nr] += std::conj(Btemp[v - 1]) * Ztemp[v][Nr]; } } Thank you. DPC++ project built for FPGA emulation takes very long time to implement on CPU Hi, I have a project developed using standard C++ and another project with same function developed using DPC++ libraries and built in FPGA emulation mode. The standard C++ version runs fine when used with my test project. But the DPC++ version takes very long time to produce results when used in my test program. Should I disable/make changes in the project settings for a faster implementation. I appreciate your help. Thank you.