User Profile

tlindsay

New Contributor

Joined 5 years ago

3 Posts

View All Badges

User Widgets

Contributions

Max 10 remote update ICB memory
We have a Max 10 device set up to boot with dual compressed images and use the NIOS II to write new images over I2C to the UFM CFM0 and CFM1 on chip flash memory. The setup is similar to this guide except using I2C instead of UART: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an741.pdf The problem is with the desired functionality to be able to "update" over I2C from a pervious version that was configured to use a single uncompressed image to this new version that now has dual compressed images. The single image version supports writing to the on chip flash and can write out the UFM CFM0 and CFM1 images just as they are on the dual image version but the system will not boot after doing this. I believe the reason this fails is because of the inability to remotely update the ICB memory space. In this case the ICB settings in the old system would still indicate to boot from a single uncompressed image when in fact the flash memory has been written with dual compressed images. What can I do to enable the NIOS to write to the ICB memory space so that it can be updated to correspond with the UFM and CFM0/1 images. For reference the memory map of the POF for the dual image version is provided below: BLOCK START ADDRESS END ADDRESS ICB 0x00000000 0x00001FFF UFM 0x00002000 0x00011FFF CFM0 0x000BA000 0x00161FFF (0x00106917) CFM1 0x00012000 0x000B9FFF (0x0005F147)
Solved
4 years ago Place FPGA Device
1.5KViews
0likes
1Comment
Re: NIOS II QSPI reset vector
*face palm* Thank you BDarji.
5 years ago Place Quartus® Prime
2.5KViews
0likes
1Comment
NIOS II QSPI reset vector
I want to boot NIOS II from QSPI on a MAX10. I am fallowing these documents as a guideline: Section 5.2.4 from: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/nios2/edh_ed_handbook.pdf Section 1.5.3 from: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an730.pdf The point where I run into a problem is on selecting the reset vectors for the NIOS II. In all the examples I have looked at they show the QSPI being listed in the reset vector drop down box. However in mine it is not listed. I have the "Generic QUAD SPI controller II Intel FPGA IP" populated in platform designer and have even been able to communicate with the QSPI memory from inside my NIOS application. However, I want to be able to boot from the QSPI. What am I missing to have the QSPI populate as an option in the NIOS II reset vectors.
5 years ago Place Quartus® Prime
2.5KViews
0likes
3Comments