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MAX10 linker NIOS/e program to external Hyper RAM?
I have done a Hyper RAM controller by systemverilog and communicate to it due to "mm_pipeline_bridge" in QSYS. I can write and read data into my external Hyper RAM under NIOS program. Everything work correctly while accessing as data due to BASE_ADDRESS generated by QSYS. But now I want to put my code into external Hyper RAM and gotten failure. In Linker I composed a memory device an regions with appropriate addresses (QSYS), after that I have chosen in linker ( .bss, .heap, .stack, .rodata, .rwdata, .text) tab of bsp editor and set composed regions. Everything is compiled. No errors. And all .hex files generated (on_chip_flash.hex, mm_bridge_0.hex and on_memory_0.hex). After that I have generated a .pof file and chosen option "load memory file" with "on_chip_flash.hex". What I must do to run my code from external Hyper RAM? Big request to all: PLEASE, DO NOT ANSWER ME IN ABSTRACT STYLE OR REFER ME TO "n2sw_nii5v2gen2.pdf" HEAD 7.15.2.2.1KViews0likes3CommentsRe: Remote update hex file in UFM MAX10 due to UART
Hi YuanLi_S_Intel! I know this AppNote, it has a description about CFM upgrading and HAL-soft using, but I need UFM upgrading and NOT HAL-soft using, as I had written earlier. I want to compose a verilog's module which has to receive data (.rpd file and swap bits in each byte) and handle with on_chip_flash IP. Because I am not using QSPI flash in my MAX10 project. My code will be stored in UFM of MAX10. Also "scanf" function is more expansive of flash memory, therefore I want to upgrade my code (UFM) due to UART and verilog's module. In last post you answered that I can handle with on_chip_flash IP by help of verilog's module. Can you point me where is it described or do you have some examples of it?1.2KViews0likes0Comments- 2.5KViews0likes0Comments
Re: MAX10 "JTAG_Lock_Unlock"
Hi YuanLi_S_Intel! Currently I am NOT able to do UNLOCK / LOCK design secure mode based on this design example, because I have LOCKed JTAG more earlier when I had unintentionally tried to enable JTAG secure mode in my project's POF file and the POF was encrypted with the WRONG key. (see ''ug_m10_config.pdf" UG-M10CONFIG 2020.06.30, page 40). Since time my chip is LOCKed and I can NOT implement any SOF/POF file into my chip.2.5KViews0likes0CommentsRe: MAX10 "JTAG_Lock_Unlock"
Hi YuanLi_SIntel, As far as I know the only way to implement sof or pof files into MAX10 is JTAG. I have compiled the project ("JTAG_LOCK_UNLOCK"). I can make the encrypted bitstrim pof-file. So I still can not realize how can I implement into chip my pof-file by help of internal JTAG in such way? And what do you mean writing REMOVE THE FLASH? Excuse me for my importunity, can you explain me more detailed?2.5KViews0likes0CommentsMAX10 linker NIOS/e program to external Hyper RAM?
I have done a Hyper RAM controller by systemverilog and communicate to it due to "mm_pipeline_bridge" in QSYS. I can write and read data into my external Hyper RAM under NIOS program. Everything work correctly while accessing as data due to BASE_ADDRESS generated by QSYS. But now I want to put my code into external Hyper RAM and gotten failure. In Linker I composed a memory device an regions with appropriate addresses (QSYS), after that I have chosen in linker ( .bss, .heap, .stack, .rodata, .rwdata, .text) tab of bsp editor and set composed regions. Everything is compiled. No errors. And all .hex files generated (on_chip_flash.hex, mm_bridge_0.hex and on_memory_0.hex). After that I have generated a .pof file and chosen option "load memory file" with "on_chip_flash.hex". What changes do I have to make in linker script for that?1.1KViews0likes0CommentsRe: MAX10 "JTAG_Lock_Unlock"
Hi YuanLi_S_Intel, I know about this project ("max10-jtag -secure-unlock"), even more, before writing to Intel's community I had downloaded and compiled its and tried to use them, but HOW I CAN CONFIRURE .SOF FILE INTO CHIP if chip's jtag is LOCKED now? In my first post I had written about it. Maybe I don't understand something.... Can you explain me?2.5KViews0likes0Comments