robertzab
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Re: JESD240B - No license
Hi, I am currently in the testing phase on the EVK with the ADC converter, and I assumed that this IP would work in Evaluation Mode with JTAG connected, as it always did before. Previously, with the Arria 10 GX, this was exactly how I worked — testing with JTAG connected, and once everything was confirmed to be working properly, the license was purchased. Has anything changed in this regard?JESD240B - No license
Hi, I am running the ADC on the Arrow DevKit – Agilex 5 E-Series AXE5 Eagle Development Platform. The converter is the EVAL-AD9695, which uses the JESD204B interface. I initially used ‘Generate Example Design’ and then adapted it for this converter. However, after making the changes and assigning the pins, I wanted to generate the final output file, but I encountered the following license error: On the licensing page, I do not see any entry for JESD204B anywhere. “What can I do to test the design? I previously worked with the Arria 10 GX, and I did not have such problems there.Agilex 5 – Critical HSSI Error in JESD204B Example Design
Hi, I am bringing up the JESD204B interface on the dev kit. For this, I used the "Generate Example Design" option with the following parameters: When I generate the project and start synthesis, it reaches the "HSSI Support Logic Generation" stage, and Quartus reports the following critical error: It turns out that the generated file contains an inconsistency in the generated HSSI metadata. My fix was to replace the entry in: The problem is that after updating the Qsys file, it gets changed back to intel_jesd_RX, and HSSI reports the critical error again. If there is already a fix or workaround for this issue, please let me know. For now, I added a simple script that I run from PowerShell: that replaces this value with the correct one:Re: Agilex 5 - PCIe
Hi, When I initially saw in your documentation that there was information about changing the BIOS setting from “AUTO” to the appropriate standard, I changed it immediately, but unfortunately I got the same error. Unfortunately, I’ve had a problem with the DevKit (MK-A5E065BB32AES1) right from the start—I even started a thread on the forum about it: https://community.intel.com/t5/FPGA-SoC-And-CPLD-Boards-And/Problem-DevKit-Agilex-5-MK-A5E065BB32AES1/m-p/1675889#M29564 And from the Arrow distributor, I received their startup kit: https://www.arrow.com/en/research-and-events/articles/new-intel-arrow-axe5-eagle-fpga-dev-kit-discover-the-molex-interconnects I’m currently working on that one. I’ll try to check it on a different host as well. By the way, do you have any Windows drivers?Re: Agilex 5 - PCIe
Thank you for your response. I’ve reviewed the documents and followed everything according to the documentation. As I mentioned in my previous message – the system sees the device and has theoretically negotiated the link. Below is also a screenshot from SignalTap: I'm also including the "Event Counter" tab from the console: To be honest, I’m not sure where the issue is.
