Warning (272007): Errors encountered during regeneration of clearbox design file altera_tse_alt4gxb_gige_wo_rmfifo.v for device_family Cyclone IV GX, the original design may not work correctly.

Description

Due to a bug in Qsys version 11.1, Quartus® II software may report Warning (272007) for Qsys system includes Triple Speed Ethernet MegaCore Function for Cyclone® IV GX devices.

Resolution

1. Open QIP file Qsys generated with a text editor. The QIP file is located in synthesis directory.

2. Delete following 6 lines

set_global_assignment -library "lib_[instans name]" -name VERILOG_FILE [file join $::quartus(qip_path) submodules/altera_tse_alt2gxb_arriagx.v]
set_global_assignment -library "lib_[instans name]" -name VERILOG_FILE [file join $::quartus(qip_path) submodules/altera_tse_alt2gxb_basic.v]
set_global_assignment -library "lib_[instans name]" -name VERILOG_FILE [file join $::quartus(qip_path) submodules/altera_tse_alt2gxb_gige.v]
set_global_assignment -library "lib_[instans name]" -name VERILOG_FILE [file join $::quartus(qip_path) submodules/altera_tse_alt2gxb_gige_wo_rmfifo.v]
set_global_assignment -library "lib_[instans name]" -name VERILOG_FILE [file join $::quartus(qip_path) submodules/altera_tse_alt4gxb_gige.v]
set_global_assignment -library "lib_[instans name]" -name VERILOG_FILE [file join $::quartus(qip_path) submodules/altera_tse_alt4gxb_gige_wo_rmfifo.v]

3. Save and close the QIP file

4. Compile your design again

This problem is resolved begining with the Quartus II software version 12.0.