How can I improve the compilation time performance of the parallel compilation feature in the Quartus II software?

Description

Beginning with version 6.1, the Quartus® II software can use multiple processors to reduce compilation time. In most cases, you get the most compilation time reduction simply by specifying the number of processors in your system. To specify the number of processors available for Quartus II compilation, on the Assignments menu, select Settings. From the Settings dialog box, under Category, click Compilation Process Settings. In the dialog box that appears, specify the Maximum processors allowed for parallel compilation. The default value for the number of processors is 1, which disables parallel compilation.

Refer to the Related Solution linked at the bottom of this Solution for some reasons why parallel compilation may not achieve the expected reduction in compilation time.

Systems with all of the following characteristics may require additional configuration to achieve the lowest possible compilation time:

• The system has more than two processor cores (excluding Intel HyperThreaded cores)
• The system is running Microsoft Windows
• The processor cores share a level of cache. For example, Intel Core 2 Duo and Intel Core 2 Quad processors share 2nd level cache. In addition, the AMD Barcelona processor and some recent Sun UltraSPARC processors are also affected. But AMD Opteron processors (as of May 2007) do not share a level of cache.

For example, if you have a system with a single Core 2 Duo processor, this Solution does not apply to you because the system does not have more than two processor cores. However, if your system has two Core 2 Duo processors (a total of four cores), you may need to follow the instructions below for the lowest possible compilation time.

The processors used for parallel compilation operations must communicate at a very high rate. Shared caches offer one of the fastest methods of communication for the Quartus II software. Microsoft Windows is not always able to detect processors with single, shared caches, so it cannot always use the optimal pair of processors to run the Quartus II software. The method described below forces specific processors to be used when such high-speed communication is required.

First determine whether your system already achieves the lowest possible compilation time. If it does, the system does not require additional configuration. To determine whether you are affected by this issue, follow these steps:

1. Set Maximum processors allowed for parallel compilation to 1.
2. Fit your design.
3. Find the message that indicates the Placement Operations time,and record that time, excluding any time spent performing Physical Synthesis.
4. Enable parallel compilation with two or more processors. Do not make any other changes to your design.
5. Re-fit your design.
6. Once again, find the message that indicates the Placement Operations time and record the time, excluding any time spent performing Physical Synthesis.

The Placement Operations time is typically about 10% lower for 2 or more processors with parallel compilation using default Quartus II settings. If the compilation time is higher using parallel compilation than without it, or if the compilation time decreases by significantly less than 10%, perform the following steps that may reduce the compilation time.

1. Choose two processors that share a cache that you want the Quartus II software to use.
2. For each of the two processors, calculate its lock number with the formula 2 ^ (<processor ID> - 1)
• Processors in your computer have consecutive processor IDs, starting with 1. Typically, processors that share a level of cache have consecutive IDs, but this is not always true. You must determine the ID and cache correlation for your system.  
3. Add the lock numbers of the two processors you chose in step 1.
4. Add the following line to your <revision>.qsf file:
   set_global_assignment -name INI_VARS “processor_shared_cache_mask=<number>” where <number> is the sum of the two lock numbers from step 3.

The following example shows how to configure the Quartus II software to use processors with IDs 3 and 4.

1. Calculate the lock numbers:
   3: 2 ^ (<processor ID> - 1) = 2 ^ (3 – 1) = 4
   4: 2 ^ (<processor ID> - 1) = 2 ^ (4 – 1) = 8
2. Add the lock numbers:
   4 8 = 12
3. Add the following line to your <revision>.qsf file:
   set_global_assignment -name INI_VARS “processor_shared_cache_mask=12”

This problem is fixed beginning with the Quartus II software version 8.0.

Related Articles

• Why don't I see the expected compilation time reduction with parallel compilation?