Does the INT_ENABLE control register of the Vector Interrupt Controller Core (VIC) effect both maskable and non-maskable interrupts ?

Description

Yes.  The INT_ENABLE control register of Vector Interrupt Controller Core (VIC) holds the enable status of each interrupt input. Also, interrupts that are not enabled are never considered by the priority processing block, even when the interrupt input is asserted. This applies to both maskable and non-maskable interrupts.