Do I need to follow tR and tF specification for fast passive parallel when DCLK-to-DATA ratio is larger than 1 in Intel® Arria® 10 Devices?

Description

No.  There is Table 80.  FPP Timing Parameters When the DCLK-to-DATA[] Ratio is >1 for Intel® Arria® 10 Devices in Intel Arria 10 Device Datasheet.  The table in version 2018.09.24. or earlier described t_R or t_F specification which is incorrect. There should be no t_R or t_F specification in the FPP Timing Parameters.

Resolution

t_R and t_F specification have been removed from FPP Timing Parameters since Intel Arria 10 Device Datasheet version 2018.11.29.