Knowledge Base Article

DDR2 and DDR3 SDRAM Controller with UniPHY Simulation Fails in Riviera

Description

Simulations with the Riviera software fail.

Resolution

To work around this issue, modify the following lines in rand_burstcount_gen.sv� outside of the generate block:�

localparam MIN_EXPONENT= ceil_log2(MIN_BURSTCOUNT);� localparam MAX_EXPONENT= log2(MAX_BURSTCOUNT);� localparam EXPONENT_WIDTH= ceil_log2(MAX_EXPONENT);
Updated 3 months ago
Version 3.0
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