Knowledge Base Article

At what stage in the Quartus II compilation process are the MIF files generated for Stratix V, and Arria V devices using transceiver dynamic reconfiguration?

Description

The MIF files are generated in the Quartus® II software Assembler stage for Stratix® V and Arria® V transceiver devices.

Updated 23 days ago
Version 3.0
Arria® V FPGAs and SoCs
Stratix® V FPGAs
troubleshooting
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