write_sdc is not working!

Dumping a static SDC rather than using the original saves hours of compilation time. The fitter runs SDC files around 14-16 times. In large designs where your SDC files search through the netlist for pins and clocks to apply constraints, it takes 10s of minutes in some projects and up to an hour in others...simply to search the netlist and find the proper fanin/out signals to apply constraints to. Now imagine the fitter calling these 15 times!? In our designs, we dump the SDC file using write_sdc at the end of the first run through the fitter, and the fitter reuses the static SDC so that our fit times are in some cases cut in half or more...depending on the project. However, with DDR3 in the design, we cannot use this same SDC file. It fails in time quest. In that case, we have to run the 'static' write_sdc constraints then call the altera core constraints to get it to pass. What I suspect is happening is that the altera core constraints are applied yet not dumped during write_sdc. Some sort of 'hidden' SDC constraints like the cuts they build into the tool for FIFOs...that you can't see...but are happening.