Forum Discussion
There is no documentation/information regarding this behavior other than the message you see in the report. There is also no standard way to prevent the compiler from increasing the channel depth on its own. In your case, since the channel depth is being increased from 0 to 1, the area overhead will be negligible and there is no reason to be worried about this; the real problem arises when you set the channel depth to 1 and the compiler decides to increase it to 1024, wasting half the Block RAMs of the device to implement a bunch of channels… I reported one such case to Altera over one year and a half ago, they said they will try to improve the behavior in future but as you can see, nothing has changed.
In extreme cases, you can create a false cycle of channels in which case the compiler will then not optimize the channel depth anymore and just use the exact depth you specified in the kernel.