Altera_ForumHonored Contributor14 years agoWhat's the purpose of set_clock_latency ? We have a StratixIV design that if built 20 times with quartus, will fail 18 times when run on the board. Timing of the failing build is very similar to the timing of the "good" build. Th...Show More
Altera_ForumHonored Contributor14 years agoThis is the constraint set_clock_latency -source 0.100 uclock
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