Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

VMM using Questa.6.6.

Hello Experts, We are working on one project based on VMM methodology so to compile it we are using Questasim. But we are facing a problem to run it. First it wasn't getting a path for VMM...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Hi Dreku,

--- Quote Start ---

By using -L switch in vsim, the error of vmm_str_match is removed but the design is not loading during simulation.

--- Quote End ---

What is the error message?

Have you tried one of the examples from Mentor's Verification Academy?

http://www.verificationacademy.com/

I suspect they have a forum there that might have users with a little more experience with Questa and the VMM (+ UVM + OVM) libraries

If you can setup a small example SystemVerilog example, I can try simulating it with Modelsim-SE, I think I have all the Questa stuff supported, if not, I can download it from Mentor.

Cheers,

Dave