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Altera_Forum
Honored Contributor
14 years agoHey,
I edited the code but I have the same error - Error (10515): VHDL type mismatch error at pract.vhd(36): natural type does not match string literal Error (10515): VHDL type mismatch error at pract.vhd(36): std_ulogic type does not match string literal case sel is when "0" => oLEDG("000") <= "000"; when "1" => oLEDG("000") <= "111"; end case;