--- Quote Start ---
No this function makes a N-wide
std_logic_vector filled with copies of the std_logic input argument '
l'.
If you want a function to do the 'and' operation between a
std_logic and a
std_logic_vector:
function "and"( v: std_logic_vector; l : std_logic; width : positive) return std_logic_vector is
variable r : std_logic_vector( width - 1 downto 0);
begin
for i in 0 to width-1 loop
r(i) := v(i) and ll;
end loop;
return r;
end function ;
PreMHQ1P <= PosMHQAD and AddAndDb ;
This is effectively
overloading the
and operator. It may seem the nicest solution, but beware:
it will be silently applied even if it may not be your intention. So my first solution, copyextend, is clearer as it unequivocally shows the intent of the operation. As a rule:
it is not a good idea to overload operators for standard types. --- Quote End ---
Hi josyb,
I got it. I'm so sorry that i didn't read your first post carefully. Now, i'm clear. Thank you again for you help.
Honored Contributor
