Altera_Forum
Honored Contributor
12 years agovectors in VHDL
hi every body do u know how we can have vectors with different length in VHDL? the number of my vectors and their length depend on a parameter such as N. thank you.
can you repost the code with a real example. Std_logic_vector is a type and you cannot index into it. You are also implying you want to assign an ever decreasing sized vector - you're not allowed to have an array of vectors with different sizes.