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Altera_Forum's avatar
Altera_Forum
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12 years ago

vectors in VHDL

hi every body do u know how we can have vectors with different length in VHDL? the number of my vectors and their length depend on a parameter such as N. thank you.
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

quite easy:

signal my_sig : std_logic_vector(N-1 downto 0);