UART and MODELSIM ALTERA (code attached)

Hi,

I have a very simple issue, could some one give me a help with that please?

I made a counter from 0 to 12 to aproximate a counting from 0 to 12,5 need to make a 115200 bps rx uart.

This counting should begin when the rx receives the start bit '0', and reset when the stop bit' 1' is achieved.

So, the RX controls the reset of the MOD counter. I made this way to avoid the pulse going over the length of the bit for the next bytes, due to the error 0,5 in counting.

the only signal I need help in the code is in rx_uart.vhd.vhd , signal en_mod_reset: std_logic:='1';

when it is '1', the mod_27_uart.vhd do not count. When it is '0', it starts to count.

It works in the first byte received, but after it goes '1' forever.

I know it is about semantic, but I cant see what is my falt in the code.

Thanks.