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SiWu's avatar
SiWu
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1 year ago

Tcl error: ERROR: Argument <clk_object> is a collection with more than one object.

Hi all, I am using cyclone 10 GX 10cx220YF780E5G to design LVDS SERDES, when the compilation flow goes to Timing Analysis step, it has an error message: Tcl error: ERROR: Argument is a collection with...
TingJiangT_Intel's avatar
TingJiangT_Intel
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1 year ago

Hi there, I tried your design and after I add the following constraint to SDC file, your design can pass the process:

derive_pll_clocks -create_base_clocks