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I'll have to create a MM slave component which simply transfers the data to the fifo external to the Qsys system. I suppose it could be done with a PIO but it would be a bit clunky.
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If I want high-performance Avalon-ST streaming, I'll often use dual-ported RAM for this sort of thing; with one side of the RAM as an Avalon-MM slave, and the other as the data source to the device under test. In your case, the other port of the RAM could be an Avalon-ST component that you can use as your data source (or sink).
The RAM allows you to inject the commands into your component on back-to-back clock cycles.
If you want to see how the JTAG-to-Avalon-ST bridge implements an Avalon-ST command stream, see this document:
http://www.ovro.caltech.edu/~dwh/correlator/pdf/altera_jtag_to_avalon_analysis.pdf Cheers,
Dave
Honored Contributor
