Forum Discussion

llpo's avatar
llpo
Icon for New Contributor rankNew Contributor
2 years ago

Synthesize NIOS II with different .qsf and no time_limited

Hi, We are 100% new to Quartus (and FPGA in general). I have a project (the DE1-SoC Computer System that comes by default with the University Program when using NIOS II), that I would like only to...
llpo's avatar
llpo
Icon for New Contributor rankNew Contributor
2 years ago

Hi FvM, Kelly,

Thank you for your answers!

Yes: DE1-SoC (Cyclone V with ARM SoC). In the FPGAcademy courses ( https://fpgacademy.org/courses.html ) they support both ARM and Nios and we have to support Nios II. The project I am trying to synthesize is the "University Program" that Intel provides for Nios II on DE1-SoC.

I had read that Nios II/e had some limitations in floating point and I am not sure if these limitations can affect the projects professors work with; so I would prefer, if possible, to stick with the original configuration if possible.

I have just downloaded the Quartus Prime Standard 22.1std.1 with the 90-day evaluation license, but I see that this also generated the DE1_SoC_Computer_time_limited.sof file. In theory with the Standard version it should be enough, or do I need any further license of an IP or similar?

Thank you!