SOPC - simple question

The SOPC builder is integrating peripherals onto the Avalon switch fabric so the processor (typically a NIOSII) can access them. So any HDL imported using the component editor needs to have a minimal set of Avalon signals. Components can be imported as masters, slaves, or nios custom instructions (hardware that goes into the CPU instead of onto the bus). They can be mapped as register or memory, which determines how byte lanes are handled (ie dynamic bus sizing or fixed byte lanes). **

For instance, to read a 32-bit counter you would need (clock, chip select, 32-bit data, read enable). This requires some modification to your VHDL.

An alternative approach is to add a PIO (parallel i/o port) to your SOPC Builder system set up to be a read-only port. Name the PIO something like "counter_port"; you will then see pins with this name added to the generated design. In the schematic or HDL where you instantiate the NIOSII/SOPC component connect those pins to your counter. When the processor reads the PIO it will be reading your counter. This requires no modification to your counter.

** (Version 7.1 adds an additional streaming type of peripheral and designates the traditional peripheral as "memory mapped".)