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Altera_Forum
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12 years ago

SDC set_input_delay and set_output_delay constraints

Hello, I'm new to TimeQuest / SDC commands. In my design I've got an external Ethernet switch device that is sourcing a dedicated clock signal to drive data into an FPGA. The switch device al...
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Altera_Forum
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9 years ago

But min e max delays are from the point of

view of the external chip or of the fpga chip??