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Altera_Forum's avatar
Altera_Forum
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11 years ago

Saving Block Design Files get Not Responding Message

Hello, my design manager has decided to have all the engineers store their Quartus Designs on a File Server instead of their local workstation. When I do this and have a Block Design File open and th...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

I develop my FPGA designs using SystemVerilog and then generate a symbol from the HDL and then using Block Design Files to graphically show how my code and also the Megafunctions are connected. I find it very similar to Mathworks' Simulink which is all graphical and easy show to others the signal flow and control. I admit that there are pro's and con's of Block Design Files but I believe the pro's out weight the cons.