Forum Discussion
AqidAyman_Altera
Regular Contributor
2 years agoHi King22,
I helped Ashlesha to see whether can get the fpll lock in our board for Q21.1.
However, we have problem to see the fpll can lock in the signal tap in Q21.1 as you said. Can you share the snapshot of the signal for "isp_fpga_clk_locked" in Q21.1?
Another thing is, we would like to try using simulator tools to see if we can see the waveform from the fpll locked. Do you have the testbench file (.tb) so that I can check the signal from the simulator?
Regards,
Aqid
King22
New Contributor
2 years agoHi AqidAyman
1. Attached fig is snapshot of the signal for "isp_fpga_clk_locked" in Q21.1 after I push the HW_RESET on the board ,
"isp_fpga_clk_locked" will go high in the fig
2. Sorry I do'nt have .tb file for simulation
BRs
King22