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Fall3n's avatar
Fall3n
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2 years ago
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Running into an issue with a minute/second countdown timer

I would like to start by saying I know this is Quartus 2 not Prime because my college uses 2. I did not see a form for 2 but need some help. we are basically restricted to using 74192 for the countdo...
  • FvM's avatar
    FvM
    2 years ago
    Setting to 5 requires a respective value at inputs A - D. You need additional logic to implement down-counting 0 to 5 and up-counting 5 to 0.
FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
2 years ago

Why are you restricted to use 74192 counter? That's an old fashioned and awkward way to design logic circuits. Is it a homework exercise?

An appropriate way to design the circuit would be a behavioral description in VHDL or Verilog.

The error is that ten minute and second counter must be set to 5 rather than 0 when down-counting to 9.

Fall3n's avatar
Fall3n
Icon for New Contributor rankNew Contributor
2 years ago
It is a restriction for our final project. This class is an introductory Logic and Digital Design course so we have only gone over basic logic gates, adders, and down/up timers, thus the restriction to the 74192.

In relation to the set 5 how would you recommend this?
  • FvM's avatar
    FvM
    Icon for Super Contributor rankSuper Contributor
    2 years ago
    Setting to 5 requires a respective value at inputs A - D. You need additional logic to implement down-counting 0 to 5 and up-counting 5 to 0.
    • Fall3n's avatar
      Fall3n
      Icon for New Contributor rankNew Contributor
      2 years ago
      This worked. Set A and C high. I had them set low and forgot to invert my signal reading the 9 reset.