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Altera_Forum
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8 years ago

RTL Simulation

Hello, I have been using ModelSim-Altera for my RLT simulations of my FPGA designs. I usually go to Tools->Run Simulation Tool->RTL Simulation and then ModelSim launches, compiles my project, run the...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

TCL scripts does not include testbench generation, user will still have to write their own testbench unless you use modelsim feature to create one.