REMOVE_REDUNDANT_LOGIC_CELLS is important, take care.

I'm re-using this code again and faced the same issue (of course),

but as I wanted to use that option globally to preserve the netlist from Synplify and preserve my clock nets name point,

I'm now using this in the .qsf:

#No global optimization
set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS OFF
#But this is required otherwise the variable PLL clock is not working
set_instance_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS ON -to "adjustable_pll:adjustable_pll_inst"