Forum Discussion
aegeus
New Contributor
4 years agoQuartus Pro 21.1 Error in generating emif s10 example design
Hi all,
I'm generating a Stratix 10 EMIF example design on windows 10, tools version is Quartus Pro 21.1, I applied the "DDR3-1333H CL9 Component 1CS 4Gb(256Mb x 16)" presets, then generate the exa...
AdzimZM_Altera
Regular Contributor
4 years agoHi aegeus,
Can you unchecked and then check the default IO settings and generate the example design?
In the EMIF IP parameter (FPGA IO -> FPGA IO settings -> Use default IO settings)
Can test it for Agilex and Stratix 10 device?
Thanks.
Regards,
Adzim