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Altera_Forum
Honored Contributor
10 years agoProblem with while loop in an array
I need to check how many cells in an array are "filled" and how many are zeroed. The array is a one-dimensional array of 64 bits vector. Declaration in package: package my_pack is
typ...
Altera_Forum
Honored Contributor
10 years agoAlso, you need a clock for counters. Logic in FPGAs really needs to be fully synchronous or you are going to have problems.