Forum Discussion
Altera_Forum
Honored Contributor
12 years ago --- Quote Start --- Well, going back to the Quartus complaint about no source for the signal, your simplistic example probably just needs ANY driver, reset or otherwise. i.e. you don't need to add the fake reset, just the 'posedge clk' is enough. See modified snippet below, which at least works the same in Modelsim and eliminates the Quartus warnings. Not sure if this is a better fit for your existing actual code base. --- Quote End --- I had to add the fake reset to get the register to come up in the 10101010 state. Without adding a reset (even if the reset is hard-wired to never assert!), Quartus will not recognize that I want a nonzero power-up state. Adding a clock alone did not help me. I see different behavior between ModelSim and Quartus when using the snippet of code from your message. In ModelSim the counter starts at 8'b1010_1010, but in Quartus it starts at 8'b0000_0000. That's the type of situation that caused my original problem. I will file a service request about the bug with initial statements for registers in interfaces.