Forum Discussion
Altera_Forum
Honored Contributor
15 years agoThanks spaugh and BadOmen.
Even I tried (sys_clk=25mhz and sdram_clk=33mhz), I still couldn't get it working. In my Nios unsigned int i, w, r; for (i=5; i<8; i++) { IOWR_32DIRECT(SDRAM_BASE, i, i); usleep(20); } for (i=5; i<8; i++) r = IORD_32DIRECT(SDRAM_BASE, i); I see in signaltap... write 5 .... wait (20) write 6 .... wait (20) write 7 .... wait (20) ... So I think the write method seems working right. But when I read 5, 6, 7... I got 0, but I do see (CS, RAS, CAS, WE) L H L H on the lines. Thanks, Sean