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Altera_Forum's avatar
Altera_Forum
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15 years ago

Problem SDRAM....Burst Terminate!!!

Hi all, Ok, I found out that SDRAM keeps writing forever and never stop, when I call IOWR_32DIRECT(...) in SignalTap. When I look at Dev Board Cyclone II and it does show Write and Bur...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

there is some info on constraining SOPC systems if you search on this blog. I can tell you that the clock phase shift is all that is necessary though.

Have you done a timing analysis? Are you passing timing with the SDRAM controller running at 133?

I could barley get mine to run at 100Mhz on a CIII spd grade 8. Have you tried running all

are you using a custom SDRAM controller or one that is preconfigured in SOPC builder?