Forum Discussion
New ContributorPower analysis and assignment of I/O Pins
Hi Shriram,
Thank you for the clarification. However, Power Analyzer is to calculate the power consumption of the design, so the user can refer to which the highest power consumed by the design and work from that point to improve their design to get more power saving.
Additionally, you can refer to this forum thread where the user shares one technique to improve power saving for FPGA designs.
Power saving techniques for FPGA
You also can check this article What are the Power Saving values based on in the Cyclone V and Arria..
Regards,
Aqid
Regular ContributorHi Shriram,
Thank you for the clarification. However, Power Analyzer is to calculate the power consumption of the design, so the user can refer to which the highest power consumed by the design and work from that point to improve their design to get more power saving.
Additionally, you can refer to this forum thread where the user shares one technique to improve power saving for FPGA designs.
Power saving techniques for FPGA
You also can check this article What are the Power Saving values based on in the Cyclone V and Arria..
Regards,
Aqid
