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Instead of asking us if it works - how about testing it yourself and learning the tools?
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I'm doing it Tricky. I'm using Quartus II with the university Program VWF. But I'm totally new also to it. I started with vhdl and testbench two days ago.. Also a little hint could give me the right direction.
@Kaz, I need only 16 bit at the final sum as I have a 16 bit dac so at the output of the polynomial I MUST have a 16 bit signal.
So as I have understood from your last post I do not need the leading zeros in the signals input of the sum and also at the output signal.. Am I right ?
Thank you for your time !