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what is the kernel version that you are using ? did you try down grade version to ensure nothing to do with the kernel version?
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Linux kernel version? 3.13.0. Quartus Version? 14.1
I'm not sure what you're asking here.
We are testing our board using the diagnostic tool provided with the reference board in Quartus 14.1. Unmodified, this tool writes to all available memory and then checks the result. To facilitate debugging, I've modified it so that it only writes to the first 2048 bytes, and then reads the result back.
What I'm seeing in signal tap, is that all of the data is being written into memory, but the IRQ is never being raised by the DMA engine to signal that the Host->FPGA transfer completed. This hangs the application. If we scope the provided design on a DE5Net board, the IRQ is raised.
So the real question for us is: Why isn't the DMA engine raising the IRQ? What sort of issues would cause this behavior?
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