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SSFyTMT
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7 years ago

OpenCL Host Channel or Host Pipes

I attempting to implement a streaming or pseudo streaming interface between the host and device using the Intel A10 GX board, targeting the a10gx_hostch board in the a10_ref BSP supplied by Intel. I am using version 17.1.1.

I can find very little info on the host channel implementation. I was able to create a simple loopback kernel that reads from host_to_dev channel and writes back to the dev_to_host channel (the channels are described in the board_spec.xml). I can compile the .aocx without error using the aoc compiler and correctly targeting the a10gx_hostch BSP.

  <channels>
    <interface name="board" port="host_to_dev"  type="streamsource" width="256" chan_id="host_to_dev"/>
    <interface name="board" port="dev_to_host"  type="streamsink" width="256" chan_id="dev_to_host"/>
  </channels>

On the host side, I can find no support, examples, or documentation on reading/writing to these host channels. If I've missed it, I apologize. They are mentioned in Intel AN831. They are also mentioned in "Intel FPGA SDK for OpenCL Intel Arria10 GX FPGA Development Kit Reference Platform Porting Guide" - but only that they exist and how they are connected in the qsys design to a DMA.

I've found these threads that seem to use host channel / host pipe terms interchangeably .

The Intel design example for host pipes found at the link below does not mention host channels, but does say it requires a10ref_hostch.

https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/design-software/opencl/host-pipe.html

So a few questions:

1) Are host channels and host pipes the same thing??

2) If not, how do I read/write to host channels from the host? I hope it's not using low level DMA routines?

Any guidance or redirections to documents/white papers/reference designs is appreciated.

Thanks!

13 Replies

  • SSFyTMT's avatar
    SSFyTMT
    Icon for New Contributor rankNew Contributor

    Thanks DPrin! I've seen the section regarding host pipes, and the fairly new details about kernel to kernel pipes/channel convention. My initial questions was if host pipes and host channels are the same thing. There is no documentation on "host channels" even though the Intel BSP calls them host channels - which led to my confusion.

  • I understand your confusion. The underlying implementation is the same. "Channels" was a Intel/Altera extension and the name didn't get changed in the BSP. Pipes are now part of the OpenCL spec so host communication always uses pipes not channels. I'll see if I can get the BSP names changed to pipes.