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Altera_Forum's avatar
Altera_Forum
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11 years ago

New to VHDL, problem with variables/signal?

I am new to VHDL but trying to learn. I would like to make an alarm clock, i decided to start with a mux, 4bit wide 2 to 1. I am using the DE1 board, for testing i want to conect the mux to the swi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

In Addition, Just to stop all the confusion, your code contains no variables at all. Variables are different from signals. But I suggest you keep to signals until you know what you're doing.