Forum Discussion
mappy5
New Contributor
4 years agoCPU was released by the 3rd vendor.
I created a Top wrapper that outputs the IO of the CPU Top module to the FPGA pin.
However, since the number of CPU IOs is large for FPGA pins, some inputs are input from registers.
sstrell
Super Contributor
4 years agoSo can you answer the question I asked? What exactly does the report indicate is getting optimized away? And have you tried adding virtual pin assignments?