--- Quote Start ---
Hi,
signaltap is a tool for debugging. Have look to the Altera Web site for the documentation.
It would require Memory resources of the FPGA. That was the reason why I asked about it.
The only way for you is then to use a larger FPGA or maybe you reduce the word width of the ROM. Do you look for a solution for a real product or only for testing ?
Kind regards
GPK
--- Quote End ---
Dear pletz
I want to look for a solution for a real product. I'd already bought a DE2 board from Altera. When I make this project I had this error. Thank you very much.
Honored Contributor
