Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

I need a low jitter clock mux in logic cells

In my application, I need to select one of 4 recovered clocks (GXB CRU outputs) to act as timing reference for other PLLs on my system. Quartus 8.1 or StratixII GX won't allow me to use the clock co...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

I've also tried several different ways to use the clock control block, but for some reason I can't figure out, CRU outputs are not legal inputs to that (at least for dynamic selection).