Forum Discussion
New ContributorHow to use modelsim to do RTL simulation of DDR3 with UniPHY
Regular ContributorHello and Good Day,
In my opinion, you can create an example design from the EMIF IP.
And then you can a run a simulation with a Modelsim script.
You might want to refer to the link below for a reference: https://www.intel.com/content/www/us/en/docs/programmable/683841/17-0/functional-description-example-designs.html
Thanks,
Adzim
Ryan-SEUHi Adzim,
Thank you for your reply!
In fact, I used other methods to finish the simulation of modelsim. This method requires me to configure the simulation environment of modelsim correctly, write msim_setup.tcl scripts, .do files, etc. This method is very complicated, and in the process of simulation, the initialization of DDR3 can be successful, but the avl_ready signal will become unknown status after a period of high level. The problem may be that the timing I wrote is wrong, or the configuration environment is wrong. The most important thing is that all the work is done in the modelsim environment, and I still don't know what method to use to reliably complete the modelsim simulation after I wrote my own top-level file and testbench file in quartus. Which script do I need to run?
Thanks,
Ryan
