How to use modelsim to do RTL simulation of DDR3 with UniPHY

Hi everyone, Environment : WIN10 64bits, Quartus II 18.1, modelsim-altera 10.5b, cyclone V E 5CEFA9F31I7N, Micron MT41J128M16JT-125*2. I am a FPGA beginner. In my design, I used two Micron DDR3...