Forum Discussion
Altera_Forum
Honored Contributor
14 years agoIt has been ages since I have used the LAN91C111 but I'm pretty sure it uses async timing between it and the FPGA. So the MAC/PHY chip might operate on a 50MHz clock but the interface you are connecting does not. What is important is that you specify the timing relationship in terms of real time and not clock cycles so that the generic tri-state controller can drive the off-chip signals appropriately. So lets say the LAN91C111 needs a setup, hold, wait of 40ns, 20ns, 30ns and you ran the interface at 100MHz then the generic tri-state controller would drive the interface using 4T, 2T, 3T clock cycles (T = 10ns). If you select the correct LAN91C111 preset this should be done for you.