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James_Jones234's avatar
James_Jones234
Icon for New Contributor rankNew Contributor
4 years ago

Help with Circuit in Quartis Prime

For this lab, we were suppose to create a 3 bit-bidirectional shift register and implement the design into Quartis Prime and generate a waveform. I was able to build the circuit on the software, but ...
ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
4 years ago

Hi James,


In order to simulate .bdf file, you have to convert the design into VHDL or Verilog HDL format.

Check this: https://www.intel.com/content/www/us/en/support/programmable/articles/000078436.html


For standard and lite version, you can use this feature File->Create/Update->Create HDL Design File from Current File to generate HDL file for your .bdf file. This feature is not supported in pro version.


Best Regards,

Sheng

p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution and give Kudos.