HDL powerful editor.

@ fpga_fan : Good idea but we have our habits with our preferred text editor. So a higly customisable editor will be great.

I have found no free VHDL editors that are able to "refactor", I mean : to rename signals in VHDL files like rename variables in C files as Eclipse does

I also open both VHDL files and Modelsim macros (.DO) in the same editor.

I have made a few (alpha version) pythonscript for notepad++ for "refactoring" and for "copying derivated entities"

I am contributing to "source cookifier" plugin to get a "functions list" for vhdl.

Notepad++ lacks of VHDL templates (little work), hierarchy structure (much work)...

Sigasi does "refactoring" with the state of the art (not like me :-)) but not free.