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WNC_HowardHuang's avatar
WNC_HowardHuang
Icon for New Contributor rankNew Contributor
3 years ago

gate level simulation with fiftyfivenm_atom_pack library not found

Dear all, we tried to do post-simulation through Quartus standard 20.1 using ModelSIM as simulator FPGA device is 10M04DAU324C8G Here's our step for doing simulation 1. generate a new proj...
RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

I have attached a simple design with testbench so you can successfully run the gate-level simulation using Modelsim or Questa.

  1. Open the simple_design.qar and change the EDA executable paths to a valid path.
  2. Run EDA Netlist Writer.
  3. Run Gate-level simulation.

You can compare it with yours to check the simulation flow.


I recommend to upgrade the design to the latest Quartus Standard version 22.1 and the simulator tool to Questa instead of Modelsim, as Modelsim has been obsolete from Quartus Pro 20.3 or Quartus Standard 21.1 onwards.

Best Regards,

Richard Tan

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