force_type confusion

Always blocks all run in parrellel. This is not a programming language, but a hardware description language. Think of always blocks as infinite loops that get called whenever the condition after the @ is triggered. All always block run and function in parrallel. Think of them as two parrallel circuits.

1. Both always blocks are diving r1_reg. Imagine 2 circuits each connected to the same wire. One drives 0, the other drives 1. Which one wins? you dont know, so the result is X, because reg is a 4 state type, and allows multiple drivers. If you had used blocking assignments, then a race condition will occur. The result WILL depend on compile order, and it likely will fail in synthesis. Moral of the story - dont use blocking assignments in always blocks.

2. these are not gates, they are variable types. If you use system verilog, there are many more types. Stick to reg and wire, and you'll be less confused (or if it's SystemVerilog, just make everything the logic type, or integer).

3. You have multiple drivers on a2. Its pretty clear as you're assigning a2 to two different things.